这是本文档旧的修订版！
CCMP25 PLC方案之基于Realtec PHY的三网口设备树修改
CCMP25系列开发板使用Marvell的以太网PHY，它的设备树片段位于[ccmp25-dvk.dts|https://github.com/digi-embedded/linux/blob/v6.1/stm/dey-4.0/maint_ccmp2-cc91-beta/arch/arm64/boot/dts/digi/ccmp25-dvk.dts]]
和以太网口有关的设备树片段主要是ð1和ð2，这&表时是对上游的定义的修改，如果溯源的话，eth2可以在stm32mp253.dtsi（该文件由stm32mp255.dtsi引用）里找到原始定义。 eth1则在stm32mp251.dtsi中。
我们再看看和STM32MP257 EVK板子的设备树，这是使用Realtec的PHY芯片，文件在：stm32mp257f-ev1.dts， 它的源定义同样是stm32mp253.dtsi，而eth2的源定义同样位于stm32mp251.dtsi内。
因此Digi开发板和ST的EVK板子的以太网口源定义同源。修改部分在相应的板级设备树上。
需要注意的是，如是是用stm32mp257，支持三个以太网口，它大概是switch0这个节点定义的，这个定义在stm32mp257.dtsi中. 对于Digi MP255的开发板设备树，它只添加stm32mp255.dtsi，所以如果使用的是Digi ConnectCore MP257的模块，可以相应地把设备树引用文件换成stm32mp257.dtsi。因为对ST的不同型号，高阶功能的片子设备树dtsi文件会引用低层级的芯片设备树dtsi文件。所以只需添加最高阶的dtsi即可。
对于PLC参考设计，以太网PHY可以参考基于ST官方一发板的设备树来修改，具体来说，就是引用stm32mp257.dtsi，并把板级的&switch0引用也复制过来到自己的板级设备树文件上。需要注意的是，以太网的数据接口一般无需更改，但相关的reset pin脚，Digi开发板和ST EVK开发板有所不同，而PLC参考设计用的reset pin脚是基于Digi开发板的，因此，相关的修主要是在这reset pin脚的变动。 下面是PLC参考设计中改好的以太网设备树片段，支持三个以太网口。
如果你使用CCMP255，仅支持双以太网口，则可以删除不用的switch0，并为引用stm32mp255.dtsi即可，其它设备树片段完全相同。
完整的CCMP25 PLC的参考设计板级设备树源码托管在github上，点击即可查看。
ð1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ccmp25_ethernet1_pins>;
pinctrl-1 = <&ccmp25_ethernet1_sleep_pins>;
/* USER CODE BEGIN ethernet (mdio) */
mdio1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
/*
* Reference block.
*
* Add your custom PHY, reset and interrupts
* configuration.
*/
phy1_eth1: ethernet-phy@4 {
// compatible = "ethernet-phy-id0141.0dd0"; /* PHY ID for Marvell 88E1512 */
// reset-gpios = <&gpiob 3 GPIO_ACTIVE_LOW>; /* ETH1_RST */
// reset-assert-us = <1000>;
// reset-deassert-us = <2000>;
// reg = <4>;
};
/*
* This is a reference block to add an additional
* Ethernet interface to the same MDIO bus.
*/
//phy2_eth1: ethernet-phy@5 {
// compatible = "ethernet-phy-id0141.0dd0"; /* PHY ID for Marvell 88E1512 */
// reset-gpios = <&gpiob 15 GPIO_ACTIVE_LOW>; /* ETHN_RST */
// reset-assert-us = <1000>;
// reset-deassert-us = <2000>;
// reg = <5>;
//};
};
/* USER CODE END ethernet (mdio) */
/* USER CODE BEGIN ethernet1 */
phy-mode = "rgmii";
//max-speed = <100>; // Only for rmii
//max-speed = <1000>; // Only for rgmii
//st,eth-ref-clk-sel; // Only for rmii
//st,ext-phyclk; // Only for rmii
//st,eth-ptp-from-rcc; // Set when PTP (IEEE1588) clock selection is from RCC
//snps,ext-systime; // Set when HW sync (using an HW bus between the GMac and the switch)
//phy-supply = <®_3v3_eth_pwr>; // Set the appropriate PHY power
//phy-handle = <&phy1_eth1>; // Set the appropriate PHY handler
///* Set a fixed speed. */
//fixed_link: fixed-link {
// speed = <100>; // Only for rmii
// speed = <1000>; // Only for rgmii
// full-duplex;
//};
/* USER CODE END ethernet1 */
};
ð2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ccmp25_ethernet2_pins>;
pinctrl-1 = <&ccmp25_ethernet2_sleep_pins>;
/* USER CODE BEGIN ethernet (mdio) */
mdio1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
/*
* Reference block.
*
* Add your custom PHY, reset and interrupts
* configuration.
*/
phy1_eth2: ethernet-phy@4 {
// compatible = "ethernet-phy-id0141.0dd0"; /* PHY ID for Marvell 88E1512 */
// reset-gpios = <&gpiob 3 GPIO_ACTIVE_LOW>; /* ETH1_RST */
// reset-assert-us = <1000>;
// reset-deassert-us = <2000>;
// reg = <4>;
};
/*
* This is a reference block to add an additional
* Ethernet interface to the same MDIO bus.
*/
//phy2_eth2: ethernet-phy@5 {
// compatible = "ethernet-phy-id0141.0dd0"; /* PHY ID for Marvell 88E1512 */
// reset-gpios = <&gpiob 15 GPIO_ACTIVE_LOW>; /* ETHN_RST */
// reset-assert-us = <1000>;
// reset-deassert-us = <2000>;
// reg = <5>;
//};
};
/* USER CODE END ethernet (mdio) */
/* USER CODE BEGIN ethernet2 */
phy-mode = "rgmii-id";
//max-speed = <100>; // Only for rmii
//max-speed = <1000>; // Only for rgmii
//st,eth-ref-clk-sel; // Only for rmii
//st,ext-phyclk; // Only for rmii
//st,eth-ptp-from-rcc; // Set when PTP (IEEE1588) clock selection is from RCC
//snps,ext-systime; // Set when HW sync (using an HW bus between the GMac and the switch)
//phy-supply = <®_3v3_eth_pwr>; // Set the appropriate PHY power
//phy-handle = <&phy1_eth1>; // Set the appropriate PHY handler
///* Set a fixed speed. */
//fixed_link: fixed-link {
// speed = <100>; // Only for rmii
// speed = <1000>; // Only for rgmii
// full-duplex;
//};
/* USER CODE END ethernet2 */
};